SENNA – Spiking Neural Network Inference Accelerator

Spiking neural networks (SNNs) are paving the way for the next step in the development of artificial intelligence: even faster, even more energy-efficient, even closer to the way the human brain processes information. Similar to human thinking, information processing in SNNs is based on electrical impulses (spikes) that chase through an artificial network of neurons at top speed.

In simulations, SNNs are able to solve cognitive tasks in nanoseconds. However, anyone who sets out to bring this speed into application is quickly faced with the question: What hardware can keep up with this speed? The answer: only one that is also inspired by the structure of the brain. What is needed are neurons cast in silicon. And that is exactly what our Spiking Neural Network Inference Accelerator SENNA contains.

Straight forward: SENNA works directly with spike-based signals

Chip layout of the SNN accelerator SENNA
© Fraunhofer IIS
SENNA-Gen1-Layout

SENNA is a programmable, neuromorphic chip for ultra-fast and energy-efficient processing of low-dimensional time series in AI applications. Its fully parallel processing architecture – in the current design consisting of an array of 1024 artificial neurons – allows the native integration of spiking neural networks. SENNA works with spike-based input and output signals and thus can be directly embedded in an event-based data stream.

The SENNA reference design is designed for 22 nm semiconductor processes. This means that the SNN accelerator can be used as a chip in a wide range of applications and can be implemented cost-effectively.

SENNA's spiking performance in figures

Specifications of the current SENNA reference design

Neurons:
1024

 

 

Efficient number of neurons for processing low-dimensional time series data

Minimum response time: 20 ns

 

 

Ultra-low latency for time-critical applications

Spike rate:
100 MHz

 

 

Extremely fast processing of large amounts of data

Neuron densitiy:
98 neurons/mm²

 

 

Neuromorphic computing power on a small chip area

Energy efficiency:
500 fJ/SOP

 

 

Up to 50 percent energy savings compared to DNN accelerators

Comprehensive software development kit included

SENNA is a programmable chip. The AI model to be executed can be adapted and reimplemented on the ASIC. Even completely new applications can be deployed on an existing chip.

To make this as easy as possible, we provide a software development kit for SENNA. This provides developers with a simple tool to get SNN models up and running on SENNA quickly and easily.

 

SENNA software development kit
© Fraunhofer IIS
Software development kit for SENNA: How to get your AI model on the chip

Neuron firing for time-critical applications

Intelligent signal processing

The superiority of SENNA in time series analysis makes it well-suited for analyzing signal streams in communication systems and adjusting transmission and reception procedures as needed in order to improve the efficiency and performance of the transmission.

Closed-loop
control

With its ultra-low latency and direct spike interfaces, SENNA leverages the power of SNNs to solve tasks in closed-loop control systems on timescales as short as a few hundred nanoseconds with AI.

Event-based
sensing

SENNA enables real-time and energy-efficient processing of temporal data from event-based sensors. This greatly improves adaptability and decision making in sensor-based edge devices.

From the application idea to the finished chip

Start: feasibility study for the use of SENNA
You gain clarity on how SENNA can accelerate your product or application.

Implementation: IP core design for your SNN accelerator
We adapt the SENNA reference design precisely to your application, performance requirements and target hardware. You save development costs and receive a customized IP core as a result.

Combination: integration of sensors
To keep the complexity of your finished hardware design to a minimum, we consider the integration of required sensors right from the start. No problem, because SENNA's compatibility with digital design flows allows the integration with ASICs and RISC-V processors.

Finish: preparation for small series production
We take care of the tape-out and the contact to foundries for the production of your finished SNN accelerator chips in small series.

You might also be interested in

 

Product sheet

SENNA Gen 1
Spiking Neural Network Inference Accelerator

 

Spiking neural networks

The next generation of neural networks

 

Neuromorphic computing

Energy-efficient smart chip design

 

Neurons cast in silicon: AI chip SENNA accelerates spiking neural networks

Artificial intelligence

Go back to business area “Artificial intelligence“